Why In News?

The Ministry of Electronics and Information Technology (MeitY) notified the Semicon 2.0 Programme with an expanded fiscal outlay of ₹1,27,500 crore.

What is Semicon 2.0?

Next-Generation Semiconductor Policy Framework: The upgraded phase of the India Semiconductor Mission (ISM), scaling the initial ₹76,000 crore outlay up to ₹1,27,500 crore. 

Center-Staging Chip Design & Intellectual Property: While Semicon 1.0 focused on attracting capital-intensive mega-fabs and packaging units, Semicon 2.0 targets creating Indian-owned fabless semiconductor companies that design and market proprietary silicon. 

Incentives for Overseas Citizens of India (OCIs): Expands the Design Linked Incentive (DLI) scheme to companies owned by Overseas Citizens of India, tapping into veteran diaspora engineering executives from Silicon Valley.

New Deployment-Linked Incentive (DLI 2.0): Introduces a cash reimbursement of 9% of net product sales for five years to convince electronics original equipment manufacturers (OEMs) to adopt new Indian chips over established foreign imports.

Comprehensive Supply Chain Support: Capital subsidies for domestic manufacturing of specialized semiconductor manufacturing equipment, cleanroom chemicals, ultra-pure gases, and Electronic Design Automation (EDA) software.

What is a Semiconductor?

  • Microscopic Brain of Modern Electronics: A material (usually Silicon, Germanium, or Gallium Arsenide) whose electrical conductivity lies between a conductor (like copper) and an insulator (like rubber).

  • Miniaturized Integrated Circuits (ICs): Houses billions of microscopic transistors etched on thin silicon wafers to process binary data (0s and 1s), perform mathematical logic, and store memory.

  • Ubiquitous Strategic Input: Powers every modern electronic apparatus, from everyday consumer smartphones, laptops, and washing machines to advanced automotive electric vehicles (EVs), 5G telecommunication base stations, guided missiles, and artificial intelligence (AI) supercomputers.

  • High-Entry-Barrier Global Value Chain: Involves three distinct phases: Research and Chip Design (software-heavy), Fabrication (cleanrooms requiring billions in capital), and Assembly, Testing, Marking, and Packaging (ATMP/OSAT).

Why is Semiconductor Production Significant for India?

National Economic & Digital Security: Imported electronic components constitute India's second-largest import bill after crude oil; domestic silicon design reduces critical balance of payments vulnerabilities. 

Shielding Against Global Supply Chain Disruptions: The 2021–22 global chip shortage halted Indian automotive manufacturing lines, cutting passenger vehicle production by 20% and highlighting the danger of foreign dependence.  

Strategic Military Autonomy & Defence Readiness: Equips the armed forces with tamper-proof, trusted secure microprocessors for BrahMos cruise missiles, Tejas fighter radars, and encrypted satellite communication systems. 

Capturing High-Value Knowledge Economy Margins: Chip design captures 30% to 35% of the total revenue value in the semiconductor supply chain with significantly lower capital expenditure compared to building physical fabrication foundries. 

Fuelling the IndiaAI Mission: Powering domestic artificial intelligence data centres requires high-throughput sovereign GPUs and AI accelerators, preventing foreign cloud monopolies.

Steps Taken by India to Support the Semiconductor Industry

India Semiconductor Mission (ISM): Created in 2021 as a specialized autonomous business unit within the Digital India Corporation to lead long-term national semiconductor strategies. 

Fiscal Support for Mega-Fabs (Tata Dholera Plant): Approved the Tata Electronics-PSMC commercial wafer fab in Dholera, Gujarat, with an investment of ₹91,000 crore to produce 50,000 wafers per month. 

Rapid Expansion of ATMP/OSAT Ecosystem: Sanctioned major assembly and testing plants, including Micron Technology’s $2.75 billion facility in Sanand (Gujarat), CG Power-Renesas (Sanand), and Tata Semiconductor Assembly in Morigaon (Assam). 

Design Linked Incentive (DLI) Scheme: Reimburses 50% of eligible design expenditure (up to ₹15 crore per application) and grants access to national Electronic Design Automation (EDA) software tools. 

Chips to Startup (C2S) Programme: Training 85,000 specialized B.Tech, M.Tech, and Ph.D. semiconductor engineers across 113 premier engineering universities, utilizing the C-DAC ChipIN Centre in Pune. 

Indigenous Microprocessor Development Programme: Funded the design of open-source RISC-V microprocessors, including the Shakti processor (IIT Madras) and the Vega processor (C-DAC). 

What are the Challenges in Expanding the Semiconductor Industry? 

Extreme Capital Intensity and Long Gestation Cycles: Constructing a single commercial semiconductor fab requires over $10 billion (₹85,000+ crore) in upfront capital, taking 3 to 5 years before generating any commercial output. 

Oligopoly in Electronic Design Automation (EDA) Software: Three American corporations (Synopsys, Cadence, and Siemens EDA) control over 85% of global chip design tools, charging annual software licensing fees exceeding ₹5 crore to ₹10 crore per designer, which restricts young Indian fabless startups. 

Massive Uninterrupted Power and Ultra-Pure Water Demands: A standard wafer fab consumes 20 to 40 million litres of ultra-pure water daily and requires millisecond-level power grid stability, which stresses local infrastructure in drought-prone states. 

Critical Shortage of Hands-On Fabrication Specialists: While India houses 20% of the world's chip design engineers, less than 2% possess practical operational experience in nanometer-scale cleanrooms and chemical wafer processing. 

Global Monopolies on Lithography Tools and Rare Chemicals: Advanced photolithography equipment is monopolized by Dutch firm ASML (holding 100% of extreme ultraviolet systems), while critical photoresists and hydrogen fluoride chemicals remain heavily concentrated in Japan. 

Commercial Hesitation to Adopt Unproven Indian Chips: Global and domestic smartphone and automotive manufacturers hesitate to switch from established chipmakers like Qualcomm, MediaTek, and Intel to newly designed Indian chips without multi-year reliability track records. 

Way Forward

Accelerate DLI 2.0 and Deployment Sales Incentives: Fast-track the disbursal of the 9% net sales reimbursement under Semicon 2.0 to de-risk market adoption for domestic fabless chip startups. 

Subsidize Cloud-Based Open-Source EDA Tool Access: Expand the C-DAC ChipIN Centre cloud portal to provide free or heavily subsidized remote EDA software licenses and verified intellectual property blocks to over 500 Indian fabless startups. 

Build Dedicated Ultra-Pure Industrial Water Corridors: Establish 100% circular, closed-loop industrial water recycling plants in semiconductor clusters like Dholera Special Investment Region (SIR) and Sanand, replicating successful industrial wastewater models. 

Mandate Domestic Silicon Procurement in Government Hardware: Enforce strict Preferential Market Access (PMA) quotas requiring government departments, defense forces, and smart city infrastructure to procure servers, CCTV cameras, and meters using Indian-designed chips.

Prioritize Compound Semiconductors: Focus national research funding on Silicon Carbide (SiC) and Gallium Nitride (GaN) power chips, which are critical for electric vehicle drivetrains, solar inverters, and high-voltage power grids. 

Deepen Bilateral Supply Chain Alliances (Quad & iCET): Operationalize the India-US Initiative on Critical and Emerging Technology (iCET) and the India-Japan Semiconductor Partnership to secure trusted equipment supplies, chemical gases, and joint R&D talent pipelines. 

Establish International Microelectronics Research Centres: Partner with global institutions like IMEC (Belgium) to establish specialized advanced packaging and 3D-chiplet research centers in Bengaluru and Hyderabad. 

Create a National Semiconductor Sovereign Venture Fund: Establish a dedicated equity venture fund under NIIF (National Investment and Infrastructure Fund) to provide long-term patient capital to Indian chip design startups before commercial revenue generation. 

Conclusion

By shifting focus toward indigenous chip design, fabless startups, and trusted global supply chain partnerships under Semicon 2.0, India can convert its deep engineering talent into sovereign silicon intellectual property and technological self-reliance.

Source: indianexpress

PRACTICE QUESTION

Q. With reference to the 'Semicon India' initiative and semiconductor manufacturing in India, consider the following statements:

1. Semicon 2.0 introduces a deployment-linked incentive that reimburses a percentage of net sales to encourage commercial adoption of Indian-designed chips.

2. The Shakti microprocessor was designed indigenously by the Indian Institute of Technology (IIT) Madras based on open-source RISC-V architecture.

3. Commercial semiconductor wafer fabrication requires minimal water and can operate reliably using standard untreated groundwater.

Which of the statements given above are correct?

(a) 1 and 2 only

(b) 2 and 3 only

(c) 1 and 3 only

(d) 1, 2, and 3

Answer: (a) 1 and 2 only

Explanation: 

Statement 1 is correct: Under the notified Semicon 2.0 framework (advancing the India Semiconductor Mission), a Deployment-Linked Incentive (DLI) is introduced to bridge the gap between design and market adoption. It provides a reimbursement equivalent to a percentage of net sales (set at 9% of net sales over 5 years) for newly deployed indigenous IP cores, chips, and Systems-on-Chip (SoCs).   

Statement 2 is correct: The SHAKTI microprocessor project was spearheaded and developed by the IIT Madras RISE group based on the open, royalty-free RISC-V instruction set architecture, representing a key milestone in indigenous chip design.

Statement 3 is incorrect: Commercial semiconductor wafer fabrication is an exceptionally water-intensive process, requiring millions of liters of water per day. Crucially, fabs cannot use untreated groundwater; they require Ultra-Pure Water (UPW)—water purified to extreme microscopic standards—to prevent mineral deposits and contaminants from ruining nanometer-scale wafer circuits.